(China (Mainland))
Product Summary
The EPM7256AETC144-7 is a high-density, high performance Programmable Logic device, which is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EPM7256AETC144-7N operates with a 3.3-V supply voltage and provides 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz.
Parametrics
EPM7256AETC144-7 absolute maximum ratings: (1)Supply voltage With respect to ground: –0.5 to 4.6 V; (2)DC input voltage: –2.0 to 5.75 V; (3)DC output current, per pin: –25 to 25 mA; (4)Storage temperature No bias: –65 to 150 ℃; (5)Ambient temperature Under bias: –65 to 135 ℃; (6)Junction temperature BGA, FineLine BGA, PQFP, and packages, under bias: 135 ℃.
Features
EPM7256AETC144-7 features: (1)High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAX) architecture; (2)3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability; (3)MAX 7000AE device in-system programmability (ISP) circuitry compliant with IEEE Std. 1532; (4)EPM7128A and EPM7256A device ISP circuitry compatible with IEEE Std. 1532; (5)Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1; (6)Supports JEDEC Jam Standard Test and Programming Language (STAPL) JESD-71.
Diagrams
| Image | Part No | Mfg | Description |  |
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 EPM7256AETC144-7 |
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IC MAX 7000 CPLD 256 144-TQFP |
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EPM7256AETC144-7N |
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IC MAX 7000 CPLD 256 144-TQFP |
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