Product Summary

The EP1C20F400C8N is an FPGA. It contains a two-dimensional row- and column-based architecture to implement custom logic. Column and row interconnects of varying speeds provide signal interconnects between LABs and embedded memory blocks. The EP1C20F400C8N consists of LABs, with 10 LEs in each LAB. An LE is a small unit of logic providing efficient implementation of user logic functions. LABs are grouped into rows and columns across the device. The EP1C20F400C8N ranges between 2,910 to 20,060 LEs.

Parametrics

EP1C20F400C8N absolute maximum ratings: (1)VCCINT, Supply voltage With respect to ground: –0.5 to 2.4 V; (2)VCCIO: –0.5 to 4.6 V; (3)VCCA, Supply voltage With respect to ground: –0.5 to 2.4 V; (4)VI,DC input voltage: –0.5 to 4.6 V; (5)IOUT, DC output current, per pin: –25 to 25 mA; (6)TSTG, Storage temperature No bias: –65 to 150℃; (7)TAMB, Ambient temperature Under bias: –65 to 135℃; (8)TJ, Junction temperature BGA packages under bias: 135℃.

Features

EP1C20F400C8N features: (1)Differential and single-ended I/O standards; (2)3.3-V, 64- and 32-bit, 66- and 33-MHz PCI compliance; (3)Joint Test Action Group (JTAG) boundary-scan test (BST) support; (4)Output drive strength control; (5)Weak pull-up resistors during configuration; (6)Slew-rate control; (7)Tri-state buffers; (8)Bus-hold circuitry; (9)Programmable pull-up resistors in user mode; (10)Programmable input and output delays; (11)Open-drain outputs; (12)DQ and DQS I/O pins.

Diagrams

 EP1C20F400C8N  datasheet

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EP1C20F400C8N
EP1C20F400C8N


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Data Sheet

0-60: $39.42
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